1. The Field of the Invention
The present invention generally relates to the testing of physical data paths in communications networks. More particularly, some example embodiments of the invention relate to serializer, deserializer, and/or serdes integrated circuits (“ICs”) with at least one test mode enabling end-to-end testing of physical data paths.
2. The Related Technology
The IEEE 802.3ba Task Force has adopted a 4×25 gigabit per second (“G”) architecture for 100 G 10 km and 40 km single mode fiber (“SMF”) polarization mode dispersion (“PMD”) optical interface and a 10×10 G architecture (“CAUI”) for 100 G electrical interface. This requires a 10:4 mapping function—implemented in a serializer or serdes—to convert between the 10×10 G and 4×25 G interfaces on the transmit side, and a 4:10 mapping function—implemented in a deserializer or serdes—to convert between the 4×25 G and 10×10 G interfaces on the receive side.
A side-effect of this architecture is that there is no deterministic mapping between a 10 G electrical lane and a 25 G optical lane. Further, none of the 10:4/4:10 mapping functions allow deterministic mappings between 10 G input lanes on the transmit side and 10 G output lanes on the receive side. In other words, data on a given input lane, such as TX_0 on the transmit side, does not necessarily come out on the corresponding output lane, such as RX_0 on the receive side. The non-deterministic nature of the mappings complicates testing because it makes it impossible to make end-to-end tests of specific physical paths. Further, testing of the 25 G serial lanes typically requires 25 G test equipment, which is substantially more expensive than 10 G test equipment used to test the 10 G parallel lanes.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced